The present invention relates to an information processing unit, and more particularly, to an information processing unit having a circuit for transmitting and/or receiving information and being adapted for use in a multi-processor system.
In a typical information handling system, an information processing unit such as a central processor, a microprocessor or a one-chip microcomputer is coupled to memories and one or more peripheral devices (for instance, keyboards, display devices, printers, etc.). The coupling is effected by means of one or more signal lines. In this arrangement, the information processing unit acts usually as a control unit, while the memory or the peripheral devices act as a controlled unit. Specifically the information processing unit performs the function of managing the memory and the peripheral devices and the memory and peripheral devices are designed so as to operate under the control of the information processing unit. Among the control functions performed by the information processing unit, a representative and important function is control of information transmission, wherein the processing unit generates control signals indicating whether information is to be received from or transmitted to a controlled device. (Such signals are normally called a "read control signal" and a "write control signal", respectively). Accordingly, a transmission control circuit for generating and outputting the control signal is necessitated on the side of the information processing unit where the control unit is located. On the other hand, on the side of the information processing unit or device where the controlled unit is located a transmission processing circuit is necessitated which receives the control signal and carries out processing of information input or output exactly as indicated by the control signal.
In a prior art, approach a transmission control circuit was provided which was used as an output circuit for control signal output use only, and a transmission processing circuit was provided which was used as an input circuit for control signal receiving use only. In other words, a hardware circuit was designed such that the unit performing the control function operated as a master unit and the unit performing the controlled function operated as a slave unit. In such a master-slave type information handling system, the master side cannot operate as a slave and the slave side cannot operate as a master. Accordingly, unless a transmission control circuit is provided in the unit performing the controlled function to generate and output an appropriate control signal, it is impossible to make the master unit (information processing unit) operate virtually as a slave. The absence of such a capability is a specific drawback of the prior art approaches.
A similar problem resides in a multi-processor system composed of a plurality of information processing units, particularly in a multi-microprocessor system. Though this system can execute a higher grade of program processing than a single-processor system (and therefore is expected to be widely used in the information handling field in the future,), at present such systems suffer a drawback in that the various information processing units which make up the system are all designed so as to operate as masters and are thus each provided with a transmission control circuit only. Therefore, unless a circuit equivalent to the transmission processing circuit is added independently, information transmission cannot be achieved between the information processing units. Where micro-processors are used as information processing units, the number of external terminals for connecting signal lines cannot be made large. This is due to the fact that as a micro-processor is formed on a semiconductor chip using semiconductor integrated circuit techniques, any increase in the number of external terminals on the semiconductor integrated circuit chip is most difficult and would lead to a very high manufacturing cost.
A multi-processor system is required to achieve information transmission at a high speed for information processing in applications imposing severe time limitations such as video pattern processing, audio or sound synthesis processing, control processing for medical and diagnostic instruments, aircraft instruments, etc. Moreover, a multi-processor system should occupy only a minimum space and be as simple as possible. Also an effort must be made to not destroy the utility of the multiprocessor system as a general purpose information processing unit. To this effect, the various processors should be usable in both a multi-processor system and a single-processor system.
However, heretofore known information processing units could not fully resolve and meet the above-mentioned problems and requirements, and especially had various shortcomings in a multiprocessor system.
It would be a rather simple matter to add a transmission processing circuit to an information processing unit already provided with a transmission control circuit. In that case, however, space for the transmission processing circuit is necessitated, and accordingly the chip size of the micro-processor becomes large. Accordingly, it is nearly impossible to realize the micro-processor at a low cost. Moreover, such a micro-processor would require two external terminals for the added transmission processing circuit to receive read and write control signals. In a micro-processor with a limited number of terminals, terminals which would more effectively be used for information transmission must be allotted for the read and write control signals for the transmission processing circuit. Consequently, parallel information transmission becomes impossible, and the processor is limited to serial information transmission, and hence high speed transmission cannot be achieved. Furthermore, in a single-processor system, provision of a transmission processing circuit and its accompanying terminals is also wasteful.
On the other hand, a memory-based type multi-processor system can be constructed in which direct coupling of information processing units operating as masters to each other is avoided and instead a memory that is accessible in common by the various information processing units is used as an information transmission medium. However, this system has a shortcoming that high-speed transmission is very difficult because transmitted information must always pass through a memory. In addition, a control signal generator circuit for controlling and accessing the memory as well as external terminal therefor become necessary. It has been found that there is no cost advantage in such a system. Furthermore, system construction and information transmission programming become more complex, and therefore, increase in expense and time for these is inevitable.
It is therefore one object of the present invention to provide an information processing unit which can operate both as a control unit (master) and as a controlled unit (slave).
Another object of the present invention is to provide an information processing unit which can send and/or receive information at a high speed.
Still another object of the present invention is to provide such a microprocessor that is suitable for a multi-processor system.
Yet another object of the present invention is to provide an information processing unit having both a transmission control function and a transmission processing function.
A further object of the present invention is to provide an information processing unit which achieves effective utilization of terminals and which is especially effective as a micro-processor.
A still further object of the present invention is to provide a general purpose processor that is applicable not ony to a multiprocessor system but also to a single-processor system.
A yet further object of the present invention is to provide an information processing unit that is suitable for parallel information transmission.